1. Field of Invention
The present invention relates to a method for manufacturing a semiconductor device. More particularly, the present invention relates to a method for manufacturing an even dielectric layer over a relief surface.
2. Description of Related Art
Chemical-mechanical polishing (CMP) is currently the only process that can provide global planarization in very large scale integration (VLSI) and ultra-large scale integration (ULSI).
In the process of forming a dielectric layer, the dielectric layer possesses a relief surface due to the relief of the underlayer interconnect layer or the underlayer dielectric layer. After the CMP is performed, several recesses are formed in the dielectric layer with a depth about 2000 angstroms, which is called a dishing effect. Because of the dishing effect, the scumming effect will occur in the subsequently performed photolithography process or the bridging effect will occur in subsequently formed devices. Therefore, leakage and shorts occur and the electrical efficacy is decreased. To improve the dishing induced by CMP, many methods have been developed, such as reverse mask technique and dummy pattern technique. But these methods all require an increase in photolithography and etching steps. Hence, the cost is increased.